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AI Vocabulary · 02 AI Infrastructure

What is Advanced Packaging?

Combining several chips and memory stacks into one package, side by side or on top of each other. Today one of the main bottlenecks for AI chips.

Basic

A modern AI accelerator is several chips in one housing: one or more compute dies plus stacks of HBM memory, placed close together so data travels short distances. Building this package is called advanced packaging. TSMC's CoWoS is the best-known method; it places chips and memory side by side on a silicon base.

Single chips have hit a size limit set by the lithography machines. To keep growing, the industry combines smaller chips, called chiplets, and stacks them in 3D. TSMC's former chairman Mark Liu and Stanford professor Philip Wong expect GPUs with about a trillion transistors this way within a decade.

Why it matters for you

In 2025 packaging and memory, more than chip manufacturing itself, limited how many AI chips could be built, according to Epoch AI. That scarcity shows up in prices and waiting times for AI capacity.

Own it

When providers announce new capacity, packaging is a good reality check: chips only help once they are packaged with memory and installed.

Where it comes from

See TSMC's description of CoWoS, How We'll Reach a 1 Trillion Transistor GPU by Mark Liu and H.-S. Philip Wong (IEEE Spectrum, March 2024) and Epoch AI on chip supply constraints (March 2026).

Related

HBM (High-Bandwidth Memory)AI ChipGPUFoundry

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